The present invention relates to a wafer and a method for manufacturing a semiconductor package using the same.
These days, with the development of semiconductor manufacturing technologies, semiconductor devices suitable for processing a large amount of data within a short time have been disclosed in the art.
Semiconductor devices are manufactured through a semiconductor chip manufacturing process for manufacturing semiconductor chips on a silicon wafer made of silicon having high purity, a die sorting process for electrically inspecting the semiconductor chips, and a packaging process for packaging good quality semiconductor chips.
Recently, a chip scale package, in which the size of a semiconductor package manufactured through the packaging process is no greater than about 100% to 110% of the size of a semiconductor chip, and a stacked semiconductor package, in which a plurality of semiconductor chips are stacked so as to increase the capacity and the processing speed of the package, have been developed.
The technical targets of the chip scale package and the stacked semiconductor package are to improve performances and reduce volumes.
In order to improve the performances and reduce the volumes of the chip scale package and the stacked semiconductor package, after forming semiconductor chips on a wafer through a semiconductor chip manufacturing process, a grinding process is frequently implemented to grind down the rear surface of the wafer so as to decrease the thickness of the semiconductor chips.
FIG. 1 is a photograph illustrating a conventional wafer which is formed with semiconductor chips and is thinned on the rear surface thereof.
Referring to FIG. 1, when the rear surface of the wafer is ground down to decrease the thickness of the wafer formed with the semiconductor chips, stress is induced in the wafer in the course of implementing the grinding process, and the wafer having a decreased thickness is prone to be warped or twisted due to this induced stress.
Also, when shocks and/or vibrations are applied to the wafer with stress excessively induced in the wafer, cracks can occur in the wafer and/or the wafer can break.